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| Paper: | DISPS-P3.11 |
| Session: | High Performance DSP Architectures and Systems |
| Time: | Friday, May 21, 13:00 - 15:00 |
| Presentation: |
Poster |
| Topic: |
Design and Implementation of Signal Processing Systems: Hardware for Image and Video Coding |
| Title: |
HARDWARE EFFICIENT LOSSLESS IMAGE COMPRESSION ENGINE |
| Authors: |
Lane Brooks; SMaL Camera Technologies | | |
| | Keith Fife; SMaL Camera Technologies | | |
| Abstract: |
A stand-alone and complete in-stream lossless hardware image compression engine is implemented utilizing a channel splitting and division-free arithmetic encoding technique. The hardware is less than 7000 gates and requires 0.3 mm^2 of area in a 0.35 um process. An average of 46% compression is achieved over a diverse set of images |
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