| Paper: | DISPS-L1.1 | ||
| Session: | VLSI Architectures for Video and Image Processing | ||
| Time: | Wednesday, May 19, 13:00 - 13:20 | ||
| Presentation: | Lecture | ||
| Topic: | Design and Implementation of Signal Processing Systems: Custom Processors, Architectures, and VLSI Hardware | ||
| Title: | ASYNCHRONOUS MULTI-CORE ARCHITECTURE FOR LEVEL SET METHODS | ||
| Authors: | Eva Dejnožková; Paris School of Mines | ||
| Petr Dokládal; Paris School of Mines | |||
| Abstract: | This paper proposes an asynchronous multi-core architecture for embedded systems using partial differential equations-based image processing algorithms. The study of data flow and the timing analysis is carried out in order to reveal optimal global architecture specifications. The global architecture uses a semi-parallel approach with several processing units running in parallel and shared memory blocks.The results are illustrated by the implementation of a continuous watershed transform, followed by a discussion of the measured execution time and the computational load to demonstrate the efficiency. | ||
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