DISPS-L1: VLSI Architectures for Video and Image Processing |
| Session Type: Lecture |
| Time: Wednesday, May 19, 13:00 - 15:00 |
| Location: Jolliet |
| Chair: Magdy Bayoumi, University of Louisiana at Lafayette |
| DISPS-L1.1: ASYNCHRONOUS MULTI-CORE ARCHITECTURE FOR LEVEL SET METHODS |
| Eva Dejnožková; Paris School of Mines |
| Petr Dokládal; Paris School of Mines |
| DISPS-L1.2: ENERGY EFFICIENT CLUSTER CO-PROCESSORS |
| Ali Ibrahim; University of Utah |
| Mike Parker; University of Utah |
| Al Davis; University of Utah |
| DISPS-L1.3: FULLY UTILIZED AND REUSABLE ARCHITECTURE FOR FRACTIONAL MOTION ESTIMATION OF H.264/AVC |
| Tung-Chien Chen; National Taiwan University |
| Yu-Wen Haung; National Taiwan University |
| Liang-Gee Chen; National Taiwan University |
| DISPS-L1.4: MEMORY ANALYSIS AND ARCHITECTURE FOR TWO-DIMENSIONAL DISCRETE WAVELET TRANSFORM |
| Chao-Tsung Huang; National Taiwan University |
| Po-Chih Tseng; National Taiwan University |
| Liang-Gee Chen; National Taiwan University |
| DISPS-L1.5: A LOW POWER RECONFIGURABLE DCT ARCHITECTURE TO TRADE OFF IMAGE QUALITY FOR COMPUTATIONAL COMPLEXITY |
| Jongsun Park; Purdue University |
| Kaushik Roy; Purdue University |
| DISPS-L1.6: PIPELINING OF PARALLEL MULTIPLEXER LOOPS AND DECISION FEEDBACK EQUALIZERS |
| Keshab Parhi; University of Minnesota |
Home -||-
Organizing Committee -||-
Technical Committee -||-
Technical Program -||-
Plenaries
Paper Submission -||-
Special Sessions -||-
ITT -||-
Paper Review -||-
Exhibits -||-
Tutorials
Information -||-
Registration -||-
Travel Insurance -||-
Housing -||-
Workshops